
`define InstAddrBus 31:0
`define InstBus 31:0
`define InstMemNum 64
`define InstMemNumLog2 6

module inst_rom (
    input wire ce,
    input wire[`InstAddrBus] addr,
    output reg[`InstBus] inst
);

    reg[`InstBus] inst_mem[0:`InstMemNum-1];

    initial $readmemh("inst_rom.data", inst_mem);
    integer i;
    initial begin
    $display("data:");
        for(i=0;i<9;i=i+1)
            $display("%d:%h",i,inst_mem[i]);   
    end

    always @(*) begin
        if (ce == 1'b0) begin
            inst <= 32'h0;
        end else begin
            inst <= inst_mem[addr[`InstMemNumLog2+1:2]];
        end// if
    end//always
endmodule
